The code for this counter is given below: So using the simple log formula ( (x)log(2) = log(5000000) ) we can calculate that a 23 bit wide register will be able to hold a count of 5000000. So every 5M ticks is equal to 0.1 second. So to produce a 0.1 second delay simply multiply the two. ![]() We know that the board being used has a 50 MHz clock. How to make a 0.1 second accurate delay in Verilog ![]() The 0.1 second interval is produced by another counter that will produce an enable tick every 0.1 second to increment our main counter. ![]() ![]() The counter will increment every 0.1 second. Here I am going to make a 2 digit counter that counts from 00 to 99 and then rolls over back to 00. Since I have already made a detailed post regarding 7 segment LED multiplexing, this post is going to be a short one, in which I will only explain the code via comments in code.
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